Set of CAD Tools for Superconducting and Semiconductor IC Design

Sole-source notice

Japanese title: 超伝導・半導体集積回路設計用CADツール一式

Yokohama National University plans a single tender contract for a set of CAD tools used in superconducting and semiconductor integrated circuit design. The contract is with Cadence Design Systems (Japan) BV due to compatibility reasons.

Semiconductor

Key Details

  • Source: Kanpo
  • Notice type: Sole-source notice
  • Publication date: June 1, 2026
  • Procuring entity:
  • Planned contract date: July 3, 2026
  • Intended vendor: Cadence Design Systems (Japan) BV
  • Status: Expired
  • Technology relevance: Possible
  • Business-action likelihood: Low – Single tender contract planned with a specific vendor (Cadence Design Systems Japan BV) due to compatibility reasons, limiting open competition.

Business Relevance

May interest companies providing advanced semiconductor and superconducting IC design software tools or CAD solutions.

Participation fit

This procedure is classified as sole-source and is not an open competitive tender. Direct participation is not applicable, but the notice may indicate existing government demand and active relevant vendors in Japan.

Official Source

This opportunity is based on a tender notice published in Kanpo, the official gazette of the Government of Japan.

  • Source: Kanpo, Government Procurement Notice Edition
  • Official category: 随意契約に関する公示 / Notice of single tendering procedures
  • Publication date: June 1, 2026
  • Publication: Kanpo, pages 73

Full English Translation

The following English translation was prepared from the original Japanese notice published in Kanpo. Where an official English summary appears in the Kanpo publication, it was used only for verification; the translation below is based on the Japanese source text.

Notice of single tendering procedures as follows. Date: June 1, 2026. Procuring entity: Yokohama National University, Finance Department, Accounting Division, Contract Section 1, SUGIYAMA Eriko, phone 045-339-3241. Procurement content:
(1) Item classification number 14
(2) Subject and quantity: Set of CAD tools for superconducting and semiconductor integrated circuit design. Scheduled date of single tender contract: July 3, 2026. Reason under the Government Procurement Agreement for single tendering: c 'compatibility'. Intended contracting party: Cadence Design Systems (Japan) BV.

Show original Japanese notice

随意契約に関する公示

次のとおり随意契約について公示します。 令和8年6月1日国立大学法人横浜国立大学長梅原出
◎調達機関番号415 ◎所在地番号14
〇第1号

1 調達内容
(1) 品目分類番号14
(2) 購入等件名及び数量超伝導・半導体集積回路設計用CADツール一式

2 随意契約の予定日令和8年7月3日

3 随意契約によることとする「政府調達に関する協定」の規定上の理由 c「互換性」

4 随意契約を予定している相手方の名称ケイデンス・デザイン・システムズ(ジャパン)ビー・ヴィ5担当部門 〒240-8501横浜市保土ケ谷区常盤台79-1国立大学法人横浜国立大学財務部経理課契約第一係杉山恵梨子電話045- 339-3241

Disclaimer

This page is based on the official Kanpo tender notice, with translation and a preliminary business assessment by I.J. Do. The official Japanese notice and tender documents are binding.

JBid is a beta technology-procurement intelligence service by I.J. Do.

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